Alternative Title

Towards Multipronged On-chip Memory and Data Protection From Verification to Design and Test

Subject Area

Computer Engineering


Modern System on Chips (SoCs) generally include embedded memories, and these memories may be vulnerable to malicious attacks such as hardware trojan horses (HTHs), test access port exploitation, and malicious software. This dissertation contributes verification as well as design obfuscation solutions aimed at design level detection of memory HTH circuits as well as obfuscation to prevent HTH triggering for embedded memory during functional operation. For malicious attack vectors stemming from test/debug interfaces, this dissertation presents novel solutions that enhance design verification and securitization of an IJTAG based test access interface. Such solutions can enhance SoC protection by preventing memory test instruments from adversarial access. To help with the test data collection of embedded memories that may improve SoC security and reliability, this dissertation contributes a memory test optimization unit (MTOU). To enhance functional memory protection, approaches to verify memory fault and security handling circuits are also presented.

Degree Date

Fall 12-17-2022

Document Type


Degree Name



Computer Science and Engineering


Jennifer Dworak

Number of Pages




Creative Commons License

Creative Commons Attribution-Noncommercial 4.0 License
This work is licensed under a Creative Commons Attribution-Noncommercial 4.0 License