Abstract

This research mainly focuses on the design of a novel memory I/O interface with high bandwidth and high energy-efficient for mobile computing systems in order to dramatically enhance the circuit and system bandwidth and power efficiency. The proposed memory I/O interface, exploiting multi-modulation and multi-band signaling, is capable of supporting simultaneous bidirectional data transition of 4 separate data streams across a single-ended off-chip transmission line to achieve both high speed data rate and low power consumption. This multi-band multi-modulation interface (MMI) consists of multiple RF-band transceivers which utilize ASK modulation, and baseband transceivers which utilize 4-PAM modulation to increase the I/O bandwidth while supporting simultaneous bidirectional communication. The MMI circuit was implemented in 65nm CMOS process technology. Testing results show that the MMI interface achieves an overall data rate of 14Gb/s/pin and a better energy efficiency of 2.8pJ/b/pin compared to prior works.

Degree Date

Fall 12-16-2017

Document Type

Dissertation

Department

Electrical Engineering

Advisor

Duncan MacFarlane

Second Advisor

Mohammad Khodayar

Third Advisor

Joseph Camp

Fourth Advisor

Jennifer Dworak

Fifth Advisor

Jingbo Ye

Number of Pages

102

Format

.pdf

Creative Commons License

Creative Commons Attribution-Noncommercial-No Derivative Works 3.0 License
This work is licensed under a Creative Commons Attribution-Noncommercial-No Derivative Works 3.0 License.

Available for download on Monday, December 12, 2022

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