Subject Area
Computer Engineering, Electrical, Electronics Engineering
Abstract
Achieving a high test coverage is crucial for helping to ensure that integrated circuits are working correctly and are non-defective. Although scan-based structural tests are used throughout the industry, high-level functional tests may be needed to detect some defects— especially those that are environmentally sensitive. Unfortunately, the character of functional test makes it difficult to obtain high coverage, and it is even hard to estimate coverage because fault simulation times of large circuits are long. As a result, some method is required for predicting the ability of a functional test that has not been fault simulated to detect defects. In this thesis, we extend the analysis of a previously proposed approach for the implementation of hardware monitoring to predict the detection of the hardest-to-detect faults in a circuit. This thesis will explore the ability of the approach to predict fault detections in larger circuits with known functionalities and realistic input sets for functional mode.
Degree Date
Summer 2025
Document Type
Thesis
Degree Name
M.S.
Department
Electrical Engineering
Advisor
Dr. Jennifer Dworak
Creative Commons License
This work is licensed under a Creative Commons Attribution-Noncommercial 4.0 License
Recommended Citation
Isukapalli, Dany Akshay Deep, "Statistical Monitoring of Hard Faults in Digital Systems" (2025). Electrical Engineering Theses and Dissertations. 85.
https://scholar.smu.edu/engineering_electrical_etds/85
